emac0_m_I_main_TransactionStatFilter_Opcode

         
	This register selects candidate packets based on packet opcodes. (0 disables the filter):
	
      
Module Instance Base Address Register Address
i_noc_mpu_m0_emac0_m_I_main_TransactionStatFilter 0xFFD17080 0xFFD170A0

Offset: 0x20

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

WREN

RW 0x0

RDEN

RW 0x0

emac0_m_I_main_TransactionStatFilter_Opcode Fields

Bit Name Description Access Reset
1 WREN
When set to 1, selects WR requests.
RW 0x0
0 RDEN
When set to 1, selects RD requests.
RW 0x0