Probe_emacs_main_TransactionStatProfiler_OverflowReset

         
      
Module Instance Base Address Register Address
i_noc_mpu_m0_Probe_emacs_main_TransactionStatProfiler 0xFFD14800 0xFFD14870

Offset: 0x70

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

OVERFLOWRESET

RW 0x0

Probe_emacs_main_TransactionStatProfiler_OverflowReset Fields

Bit Name Description Access Reset
0 OVERFLOWRESET
Register OverflowReset is a pulse register that clears overflow status bits per observed port on each write access. OverflowReset = nObservable. Writing 0x2  clears the overflow status of observed port 1.
RW 0x0