Probe_SoC2FPGA_main_Probe_Filters_1_Status

         Register Status is 2-bit register that selects candidate packets based on packet status.
      
Module Instance Base Address Register Address
i_noc_mpu_m0_Probe_SoC2FPGA_main_Probe 0xFFD14000 0xFFD140A0

Offset: 0xA0

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

RSPEN

RW 0x0

REQEN

RW 0x0

Probe_SoC2FPGA_main_Probe_Filters_1_Status Fields

Bit Name Description Access Reset
1 RSPEN
Selects RSP and FAIL-CONT status packets.
RW 0x0
0 REQEN
Selects REQ status packets.
RW 0x0