Probe_SoC2FPGA_main_Probe_TracePortSel
| Module Instance | Base Address | Register Address |
|---|---|---|
| i_noc_mpu_m0_Probe_SoC2FPGA_main_Probe | 0xFFD14000 | 0xFFD14010 |
Offset: 0x10
Access: RW
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved |
TRACEPORTSEL RW 0x0 |
||||||||||||||
Probe_SoC2FPGA_main_Probe_TracePortSel Fields
| Bit | Name | Description | Access | Reset |
|---|---|---|---|---|
| 0 | TRACEPORTSEL | Register TracePortSel indicates which generic protocol link is currently being observed by trace logic.The number of bits in register TracePortSel is equal to log2 of the value set for parameter nPort.The register can be updated at any time, but changes only become effective at packet boundaries. |
RW | 0x0 |