enable_clear

         Clears Master Region Enable field when written with 1
Module Instance Base Address Register Address
noc_fw_ddr_l3_ddr_scr 0xFFD13400 0xFFD13408

Offset: 0x8

Access: WO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

hpsregion7enable

WO 0x0

hpsregion6enable

WO 0x0

hpsregion5enable

WO 0x0

hpsregion4enable

WO 0x0

hpsregion3enable

WO 0x0

hpsregion2enable

WO 0x0

hpsregion1enable

WO 0x0

hpsregion0enable

WO 0x0

enable_clear Fields

Bit Name Description Access Reset
7 hpsregion7enable 
HPS Region 0 Enable Clear.
Writing zero has no effect
Writing one will clear the hpsregion7enable bit to zero
 WO 0x0
6 hpsregion6enable 
HPS Region 0 Enable Clear.
Writing zero has no effect
Writing one will clear the hpsregion6enable bit to zero
 WO 0x0
5 hpsregion5enable 
HPS Region 0 Enable Clear.
Writing zero has no effect
Writing one will clear the hpsregion5enable bit to zero
 WO 0x0
4 hpsregion4enable 
HPS Region 0 Enable Clear.
Writing zero has no effect
Writing one will clear the hpsregion4enable bit to zero
 WO 0x0
3 hpsregion3enable 
HPS Region 0 Enable Clear.
Writing zero has no effect
Writing one will clear the hpsregion3enable bit to zero
 WO 0x0
2 hpsregion2enable 
HPS Region 0 Enable Clear.
Writing zero has no effect
Writing one will clear the hpsregion2enable bit to zero
 WO 0x0
1 hpsregion1enable 
HPS Region 0 Enable Clear.
Writing zero has no effect
Writing one will clear the hpsregion1enable bit to zero
 WO 0x0
0 hpsregion0enable 
HPS Region 0 Enable Clear.
Writing zero has no effect
Writing one will clear the hpsregion0enable bit to zero
 WO 0x0