noc_fw_l4_sys_l4_sys_scr Summary

Base Address: 0xFFD13100

Register Address Offset	Bit Fields
`noc_fw_l4_sys_l4_sys_scr`
`dma_ecc` `0x8`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `RW 0x0`
`emac0rx_ecc` `0xC`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `RW 0x0`
`emac0tx_ecc` `0x10`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `RW 0x0`
`emac1rx_ecc` `0x14`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `RW 0x0`
`emac1tx_ecc` `0x18`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `RW 0x0`
`emac2rx_ecc` `0x1C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `RW 0x0`
`emac2tx_ecc` `0x20`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `RW 0x0`
`emac3rx_ecc` `0x24`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`
`emac3tx_ecc` `0x28`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`
`nand_ecc` `0x2C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `RW 0x0`
`nand_read_ecc` `0x30`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `RW 0x0`
`nand_write_ecc` `0x34`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `RW 0x0`
`onchipram_ecc` `0x38`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `RW 0x0`
`qspi_ecc` `0x3C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `RW 0x0`
`sdmmc_ecc` `0x40`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `RW 0x0`
`usb0_ecc` `0x44`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `RW 0x0`
`usb1_ecc` `0x48`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `RW 0x0`
`clock_manager` `0x4C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`fpga_manager_register` `0x50`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`pin_mux_register` `0x54`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`reset_manager` `0x58`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`system_manager` `0x5C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`osc0_timer` `0x60`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`osc1_timer` `0x64`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`watchdog0` `0x68`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`watchdog1` `0x6C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`dap` `0x70`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`						`etr` `RW 0x0`	`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`fpga_manager_streaming` `0x74`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`security_manager_streaming` `0x78`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`hmc_register` `0x7C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`hmc_adaptor_register` `0x80`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`l3_interconnect_register` `0x84`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `RW 0x0`
`ddr_scheduler_register` `0x88`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `RW 0x0`
`l4_interconnect_firewall_csr` `0x8C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `0x0`	`Reserved`							`fpga2soc` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `0x0`
`l4_interconnect_probes_csr` `0x90`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `RW 0x0`
`l4_qos_csr` `0x94`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_m0` `RW 0x0`