noc_fw_l4_per_l4_per_scr Summary

Base Address: 0xFFD13000

Register Address Offset	Bit Fields
`noc_fw_l4_per_l4_per_scr`
`nand_register` `0x0`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`nand_data` `0x4`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`qspi_data` `0x8`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`usb0_register` `0xC`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`usb1_register` `0x10`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`dma_nonsecure` `0x14`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`
`dma_secure` `0x18`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`
`spi_master0` `0x1C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`spi_master1` `0x20`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`spi_slave0` `0x24`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`spi_slave1` `0x28`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`emac0` `0x2C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`emac1` `0x30`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`emac2` `0x34`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`emac3` `0x38`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`
`qspi` `0x3C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`sdmmc` `0x40`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`gpio0` `0x44`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`gpio1` `0x48`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`gpio2` `0x4C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`i2c0` `0x50`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`i2c1` `0x54`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`i2c2` `0x58`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`i2c3` `0x5C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`i2c4` `0x60`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`sp_timer0` `0x64`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`sp_timer1` `0x68`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`uart0` `0x6C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`
`uart1` `0x70`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ahb_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu_m0` `RW 0x0`