pinmux_shared_io_q1_6
Module Instance | Base Address | Register Address |
---|---|---|
i_io48_pin_mux_shared_3v_io_grp | 0xFFD07000 | 0xFFD07014 |
Offset: 0x14
Access: RW
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved |
|||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved |
sel RW 0xF |
pinmux_shared_io_q1_6 Fields
Bit | Name | Description | Access | Reset |
---|---|---|---|---|
31:4 | Reserved | Reserved |
RO | 0x0 |
3:0 | sel | Select peripheral signals connected shared IO48 Q1 6 0000 (0) Pin is connected to Peripheral signal i2c0.scl 0001 (1) Pin is connected to Peripheral signal not applicable 0010 (2) Pin is connected to Peripheral signal not applicable 0011 (3) Pin is connected to Peripheral signal spim0.mosi 0100 (4) Pin is connected to Peripheral signal sdmmc.data3 0101 (5) Pin is connected to Peripheral signal not applicable 0110 (6) Pin is connected to Peripheral signal not applicable 0111 (7) Pin is connected to Peripheral signal not applicable 1000 (8) Pin is connected to Peripheral signal usb0.nxt 1001 (9) Pin is connected to Peripheral signal not applicable 1010 (10) Pin is connected to Peripheral signal not applicable 1011 (11) Pin is connected to Peripheral signal not applicable 1100 (12) Pin is connected to Peripheral signal qspi.ss3 1101 (13) Pin is connected to Peripheral signal uart1.rts_n 1110 (14) Pin is connected to Peripheral signal nand.adq2 1111 (15) Pin is connected to Peripheral signal gpio0.io5 |
RW | 0xF |