noc_idlereq_clr
Clear IDLE request to each NOC master.
Module Instance | Base Address | Register Address |
---|---|---|
i_sys_mgr_core | 0xFFD06000 | 0xFFD060C8 |
Offset: 0xC8
Access: WO
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved |
fpga2sdram2 0x0 |
Reserved |
fpga2sdram1 0x0 |
Reserved |
fpga2sdram0 0x0 |
||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved |
fpga2soc 0x0 |
Reserved |
lwsoc2fpga 0x0 |
Reserved |
soc2fpga 0x0 |
noc_idlereq_clr Fields
Bit | Name | Description | Access | Reset |
---|---|---|---|---|
24 | fpga2sdram2 | WO | 0x0 | |
20 | fpga2sdram1 | WO | 0x0 | |
16 | fpga2sdram0 | WO | 0x0 | |
8 | fpga2soc | WO | 0x0 | |
4 | lwsoc2fpga | WO | 0x0 | |
0 | soc2fpga | WO | 0x0 |