fpgaintf_en_0
Used to disable individual interfaces between the FPGA and HPS.
This register is reset only on a cold reset (ignores warm reset).
| Module Instance | Base Address | Register Address |
|---|---|---|
| i_sys_mgr_core | 0xFFD06000 | 0xFFD06064 |
Offset: 0x64
Access: RW
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved |
bscan RW 0x1 |
||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved |
cfgio RW 0x1 |
Reserved |
rstreq RW 0x1 |
||||||||||||
fpgaintf_en_0 Fields
| Bit | Name | Description | Access | Reset | ||||||
|---|---|---|---|---|---|---|---|---|---|---|
| 16 | bscan | Used to disable the boundary-scan interface. This interface allows the FPGA JTAG TAP controller to execute boundary-scan instructions such as SAMPLE/PRELOAD, EXTEST, and HIGHZ. The boundary-scan interface must be enabled before attempting to send the boundary-scan instructions to the FPGA JTAG TAP controller.
|
RW | 0x1 | ||||||
| 8 | cfgio | Used to disable the CONFIG_IO interface. This interface allows the FPGA JTAG TAP controller to execute the CONFIG_IO instruction and configure all device I/Os (FPGA and HPS). This is typically done before executing boundary-scan instructions. The CONFIG_IO interface must be enabled before attempting to send the CONFIG_IO instruction to the FPGA JTAG TAP controller.
|
RW | 0x1 | ||||||
| 0 | rstreq | Used to disable the reset request interface. This interface allows logic in the FPGA fabric to request HPS resets. This field disables the following reset request signals from the FPGA fabric to HPS:[list][*]f2s_cold_rst_req - Triggers a cold reset of the HPS[*]f2s_warm_rst_req - Triggers a warm reset of the HPS[*]f2s_dbg_rst_req - Triggers a debug reset of the HPS[/list]
|
RW | 0x1 |