jtag_kick

         Jtag Master Control Triggers. Each of this bit field triggers a specific hardware operation.
Module Instance Base Address Register Address
i_fpga_mgr_fpgamgrregs 0xFFD03000 0xFFD03058

Offset: 0x58

Access: WO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

clearRxFifo

0x0

clearTxFifo

0x0

stopSession

0x0

startSession

0x0

jtag_kick Fields

Bit Name Description Access Reset
3 clearRxFifo 
A write 1 to this bit field will empty the RxFifo. A read will always return 0.
 WO 0x0
2 clearTxFifo 
A write 1 to this bit field will empty the TxFifo. A read will always return 0.
 WO 0x0
1 stopSession 
A write 1 to this bit field will kick off stop of an ongoing session of TX and RX. Please note that there should be alteast 1 word available in the Tx Fifo for this kick off to be successful. The status of this kick off can be read from status register SessionStatus field.
stopSession has priority over startSession.
 WO 0x0
0 startSession 
A write 1 to this bit field will kick off a session of TX and RX. Please note that there should be alteast 1 word available in the Tx Fifo for this kick off to be successful. The status of this kick off can be read from status register SessionStatus field.
stopSession has priority over startSession.
WO 0x0