jtag_status

         status of the currently ongoing JTAG transmit or receive
Module Instance Base Address Register Address
i_fpga_mgr_fpgamgrregs 0xFFD03000 0xFFD03054

Offset: 0x54

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

txDoneSize

0x0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

SessionStatus

0x0

Reserved

rxFifoFull

0x0

rxFifoEmpty

0x1

txFifoFull

0x0

txFifoEmpty

0x1

rxFifoLevel

0x0

txFifoLevel

0x0

jtag_status Fields

Bit Name Description Access Reset
31:16 txDoneSize 
Total Number of Successful bits transferred in the current session.
The exact number of bits transferred in the current session is 1+ the value in this register.
For example
0 -> 1 bit completed transmit or in the process of transmitting.
1-> 2 bits completed transmit or in the process of transmitting.
RO 0x0
15 SessionStatus 
A read of 1 indicates that there is an ongoing transfer session. 
A read of 0 indicates that there is no ongoing transfer session.
Value Description
0 disable
1 enable
RO 0x0
11 rxFifoFull 
Read 
1 -> Rx Fifo Full
0 -> Rx Fifo NOT full
 RO 0x0
10 rxFifoEmpty 
Read 
1 -> Rx Fifo Empty
0 -> Rx Fifo NOT Empty
RO 0x1
9 txFifoFull 
Read 
1 -> Tx Fifo Full
0 -> Tx Fifo NOT full
 RO 0x0
8 txFifoEmpty 
Read 
1 -> Tx Fifo Empty
0 -> Tx Fifo NOT Empty
RO 0x1
7:4 rxFifoLevel 
Number of Words remaining in the Rx Fifo.
Maximum value is 0x8
RO 0x0
3:0 txFifoLevel 
Number of words remaining in Tx Fifo.
Maximum value is 0x8
RO 0x0