ECC_ERRGENADDR_3
Error address register
| Module Instance | Base Address | Register Address |
|---|---|---|
| ecc_hmc_ocp_slv_block | 0xFFCFB000 | 0xFFCFB16C |
Offset: 0x16C
Access: RO
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
ADDR 0x0 |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ADDR 0x0 |
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ECC_ERRGENADDR_3 Fields
| Bit | Name | Description | Access | Reset |
|---|---|---|---|---|
| 31:0 | ADDR | For decoder 3. Address generated with SER or address mismatch logic. Address will be driven by the ECC decoder on every read latched by the RAM independent of ECCDiagon is on. |
RO | 0x0 |