MPR_3BEAT1
MPR register [127:96] for first beat
| Module Instance | Base Address | Register Address |
|---|---|---|
| ecc_hmc_ocp_slv_block | 0xFFCFB000 | 0xFFCFB01C |
Offset: 0x1C
Access: RO
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
MPR96 0x0 |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
MPR96 0x0 |
|||||||||||||||
MPR_3BEAT1 Fields
| Bit | Name | Description | Access | Reset |
|---|---|---|---|---|
| 31:0 | MPR96 | MPR reg[127:96] for first beat |
RO | 0x0 |