gpio_config_reg1

         Name: GPIO Configuration Register 1
Size: 32 bits
Address Offset: 0x74
Read/Write Access: Read
Module Instance Base Address Register Address
i_gpio_0_gpio 0xFFC02900 0xFFC02974
i_gpio_1_gpio 0xFFC02A00 0xFFC02A74
i_gpio_2_gpio 0xFFC02B00 0xFFC02B74

Offset: 0x74

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

encoded_id_width

RO 0x1F
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

gpio_id

RO 0x1

add_encoded_params

RO 0x1

debounce

RO 0x1

porta_intr

RO 0x1

hw_portd

RO 0x0

hw_portc

RO 0x0

hw_portb

RO 0x0

hw_porta

RO 0x0

portd_single_ctl

RO 0x1

portc_single_ctl

RO 0x1

portb_single_ctl

RO 0x1

porta_single_ctl

RO 0x1

num_ports

RO 0x0

apb_data_width

RO 0x2

gpio_config_reg1 Fields

Bit Name Description Access Reset
20:16 encoded_id_width 
The value of this register is derived from the
GPIO_ID_WIDTH configuration parameter.
Value Description
0x1f ENCIDWIDTH
RO 0x1F
15 gpio_id 
The value of this register is derived from the
GPIO_ID configuration parameter.
0 = Exclude
1 = Include
Value Description
0x1 IDCODE
RO 0x1
14 add_encoded_params 
The value of this register is derived from the
GPIO_ADD_ENCODED_PARAMS configuration parameter.
0 = False
1 = True
Value Description
0x1 ADDENCPARAMS
RO 0x1
13 debounce 
The value of this register is derived from the
GPIO_DEBOUNCE configuration parameter.
0 = Exclude
1 = Include
Value Description
0x1 DEBOUNCEA
RO 0x1
12 porta_intr 
The value of this register is derived from the
GPIO_PORTA_INTR configuration parameter.
0 = Exclude
1 = Include
Value Description
0x1 PORTAINTERR
RO 0x1
11 hw_portd 
The value of this register is derived from the
GPIO_HW_PORTD configuration parameter.
0 = Exclude
1 = Include
 RO 0x0
10 hw_portc 
The value of this register is derived from the
GPIO_HW_PORTC configuration parameter.
0 = Exclude
1 = Include
 RO 0x0
9 hw_portb 
The value of this register is derived from the
GPIO_HW_PORTB configuration parameter.
0 = Exclude
1 = Include
 RO 0x0
8 hw_porta 
The value of this register is derived from the
GPIO_HW_PORTA configuration parameter.
0 = Exclude
1 = Include
Value Description
0x0 PORTANOHARD
RO 0x0
7 portd_single_ctl 
The value of this register is derived from the
GPIO_PORTD_SINGLE_CTL configuration parameter.
0 = False
1 = True
Value Description
0x1 SOFTCTLONLY
RO 0x1
6 portc_single_ctl 
The value of this register is derived from the
GPIO_PORTC_SINGLE_CTL configuration parameter.
0 = False
1 = True
Value Description
0x1 SOFTCTLONLY
RO 0x1
5 portb_single_ctl 
The value of this register is derived from the
GPIO_PORTB_SINGLE_CTL configuration parameter.
0 = False
1 = True
Value Description
0x1 SOFTCTLONLY
RO 0x1
4 porta_single_ctl 
The value of this register is derived from the
GPIO_PORTA_SINGLE_CTL configuration parameter.
0 = False
1 = True
Value Description
0x1 SOFTCTLONLY
RO 0x1
3:2 num_ports 
The value of this register is derived from the
GPIO_NUM_PORT configuration parameter.
0x0 =1
0x1 = 2
0x2 = 3
0x3 = 4
Value Description
0x0 ONEPORTA
RO 0x0
1:0 apb_data_width 
The value of this register is derived from the
GPIO_APB_DATA_WIDTH configuration parameter.
0x0 = 8 bits
0x1 = 16 bits
0x2 = 32 bits
0x3 = Reserved
Value Description
0x2 WIDTH32BITS
RO 0x2