gpio_swporta_dr

         Name: Port A data register
set_attribute $reg -attr RALAttribute -sub NO_BIT_BASH_TEST -value 1
Size: 1-32 bits
Address Offset: 0x00
Read/Write Access: Read/Write
Module Instance Base Address Register Address
i_gpio_0_gpio 0xFFC02900 0xFFC02900
i_gpio_1_gpio 0xFFC02A00 0xFFC02A00
i_gpio_2_gpio 0xFFC02B00 0xFFC02B00

Offset: 0x0

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

gpio_swporta_dr

RW 0x0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

gpio_swporta_dr

RW 0x0

gpio_swporta_dr Fields

Bit Name Description Access Reset
23:0 gpio_swporta_dr 
Values written to this register are output on the I/O signals
for Port A if the corresponding data direction bits for Port A
are set to Output mode and the corresponding control bit for
Port A is set to Software mode. The value read back is equal
to the last value written to this register.
 RW 0x0