ic_clr_tx_over

         Clear TX_OVER Interrupt Register
      
Module Instance Base Address Register Address
i_i2c_emac_0_i2c 0xFFC02400 0xFFC0244C
i_i2c_emac_1_i2c 0xFFC02500 0xFFC0254C
i_i2c_emac_2_i2c 0xFFC02600 0xFFC0264C

Offset: 0x4C

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

clr_tx_over

RO 0x0

ic_clr_tx_over Fields

Bit Name Description Access Reset
0 clr_tx_over
Read this register to clear the TX_OVER
interrupt (bit 3) of the IC_RAW_INTR_STAT register.
Reset value: 0x0
RO 0x0