ic_clr_rx_under

         Clear RX_UNDER Interrupt Register
      
Module Instance Base Address Register Address
i_i2c_0_i2c 0xFFC02200 0xFFC02244
i_i2c_1_i2c 0xFFC02300 0xFFC02344

Offset: 0x44

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

clr_rx_under

RO 0x0

ic_clr_rx_under Fields

Bit Name Description Access Reset
0 clr_rx_under
Read this register to clear the RX_UNDER
interrupt (bit 0) of the IC_RAW_INTR_STAT register.
Reset value: 0x0
RO 0x0