usb_pwrclkgrp Address Map
Module Instance | Base Address | End Address |
---|---|---|
i_usbotg_0_pwrclkgrp | 0xFFB00E00 | 0xFFB00FFF |
i_usbotg_1_pwrclkgrp | 0xFFB40E00 | 0xFFB40FFF |
Important: To prevent indeterminate
system behavior, reserved areas of memory must not be accessed by software or
hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
pcgcctl | 0x0 | 32 | RW | 0x0 | Power and Clock Gating Control Register |