diepdmab2

         Device IN Endpoint 2 Buffer Address Register

Module Instance	Base Address	Register Address
`i_usbotg_0_devgrp`	`0xFFB00800`	`0xFFB0095C`
`i_usbotg_1_devgrp`	`0xFFB40800`	`0xFFB4095C`

Offset: 0x15C

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`diepdmab2` `RO 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`diepdmab2` `RO 0x0`

diepdmab2 Fields

Bit	Name	Description	Access	Reset
31:0	`diepdmab2`	Holds the current buffer address.This register is updated as and when the data transfer for the corresponding end point is in progress. This register is present only in Scatter/Gather DMA mode. Otherwise this field is reserved.	`RO`	`0x0`

Bit

Name

Description

Access

Reset

31:0

diepdmab2

Holds the current buffer address.This register is updated as and when the data
transfer for the corresponding end point is in progress.
This register is present only in Scatter/Gather DMA mode. Otherwise this field is
reserved.

RO

0x0