daintmsk
Device All Endpoints Interrupt Mask Register
| Module Instance | Base Address | Register Address |
|---|---|---|
| i_usbotg_0_devgrp | 0xFFB00800 | 0xFFB0081C |
| i_usbotg_1_devgrp | 0xFFB40800 | 0xFFB4081C |
Offset: 0x1C
Access: RW
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
outepmsk15 RW 0x0 |
outepmsk14 RW 0x0 |
outepmsk13 RW 0x0 |
outepmsk12 RW 0x0 |
outepmsk11 RW 0x0 |
outepmsk10 RW 0x0 |
outepmsk9 RW 0x0 |
outepmsk8 RW 0x0 |
outepmsk7 RW 0x0 |
outepmsk6 RW 0x0 |
outepmsk5 RW 0x0 |
outepmsk4 RW 0x0 |
outepmsk3 RW 0x0 |
outepmsk2 RW 0x0 |
outepmsk1 RW 0x0 |
outepmsk0 RW 0x0 |
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
inepmsk15 RW 0x0 |
inepmsk14 RW 0x0 |
inepmsk13 RW 0x0 |
inepmsk12 RW 0x0 |
inepmsk11 RW 0x0 |
inepmsk10 RW 0x0 |
inepmsk9 RW 0x0 |
inepmsk8 RW 0x0 |
inepmsk7 RW 0x0 |
inepmsk6 RW 0x0 |
inepmsk5 RW 0x0 |
inepmsk4 RW 0x0 |
inepmsk3 RW 0x0 |
inepmsk2 RW 0x0 |
inepmsk1 RW 0x0 |
inepmsk0 RW 0x0 |
daintmsk Fields
| Bit | Name | Description | Access | Reset | ||||||
|---|---|---|---|---|---|---|---|---|---|---|
| 31 | outepmsk15 | OUT Endpoint 15 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 30 | outepmsk14 | OUT Endpoint 14 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 29 | outepmsk13 | OUT Endpoint 13 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 28 | outepmsk12 | OUT Endpoint 12 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 27 | outepmsk11 | OUT Endpoint 11 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 26 | outepmsk10 | OUT Endpoint 10 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 25 | outepmsk9 | OUT Endpoint 9 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 24 | outepmsk8 | OUT Endpoint 8 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 23 | outepmsk7 | OUT Endpoint 7 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 22 | outepmsk6 | OUT Endpoint 6 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 21 | outepmsk5 | OUT Endpoint 5 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 20 | outepmsk4 | OUT Endpoint 4 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 19 | outepmsk3 | OUT Endpoint 3 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 18 | outepmsk2 | OUT Endpoint 2 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 17 | outepmsk1 | OUT Endpoint 1 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 16 | outepmsk0 | OUT Endpoint 0 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 15 | inepmsk15 | IN Endpoint 15 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 14 | inepmsk14 | IN Endpoint 14 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 13 | inepmsk13 | IN Endpoint 13 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 12 | inepmsk12 | IN Endpoint 12 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 11 | inepmsk11 | IN Endpoint 11 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 10 | inepmsk10 | IN Endpoint 10 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 9 | inepmsk9 | IN Endpoint 9 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 8 | inepmsk8 | IN Endpoint 8 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 7 | inepmsk7 | IN Endpoint 7 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 6 | inepmsk6 | IN Endpoint 6 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 5 | inepmsk5 | IN Endpoint 5 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 4 | inepmsk4 | IN Endpoint 4 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 3 | inepmsk3 | IN Endpoint 3 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 2 | inepmsk2 | IN Endpoint 2 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 1 | inepmsk1 | IN Endpoint 1 Interrupt mask Bit
|
RW | 0x0 | ||||||
| 0 | inepmsk0 | IN Endpoint 0 Interrupt mask Bit
|
RW | 0x0 |