grxfsiz

         Receive FIFO Size Register
      
Module Instance Base Address Register Address
i_usbotg_0_globgrp 0xFFB00000 0xFFB00024
i_usbotg_1_globgrp 0xFFB40000 0xFFB40024

Offset: 0x24

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

rxfdep

RW 0x2000

grxfsiz Fields

Bit Name Description Access Reset
13:0 rxfdep
Mode: Host and Device
RxFIFO Depth (RxFDep)
This value is in terms of 32-bit words.
 Minimum value is 16
 Maximum value is 32,768
The power-on reset value of this register is specified as the
Largest Rx Data FIFO Depth during configuration. If Enable Dynamic FIFO Sizing was selected, 
you can write a new value in this field. Programmed values must not exceed the power-on value
RW 0x2000