gotgint

         OTG Interrupt Register
      
Module Instance Base Address Register Address
i_usbotg_0_globgrp 0xFFB00000 0xFFB00004
i_usbotg_1_globgrp 0xFFB40000 0xFFB40004

Offset: 0x4

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

dbncedone

RW 0x0

adevtoutchg

RW 0x0

hstnegdet

RW 0x0

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

hstnegsucstschng

RW 0x0

sesreqsucstschng

RW 0x0

Reserved

sesenddet

RW 0x0

Reserved

gotgint Fields

Bit Name Description Access Reset
19 dbncedone
Mode: Host only
Debounce Done (DbnceDone)
The core sets this bit when the debounce is completed after the
device connect. The application can start driving USB reset after
seeing this interrupt. This bit is only valid when the HNP
Capable or SRP Capable bit is SET in the Core USB
Configuration register (GUSBCFG.HNPCap or
GUSBCFG.SRPCap, respectively).This bit can be set only by the core and the application should write 1 to clear it.
Value Description
0x0 INACTIVE
0x1 ACTIVE
RW 0x0
18 adevtoutchg
Mode:Host and Device
A-Device Timeout Change (ADevTOUTChg)
The core sets this bit to indicate that the A-device has timed out
WHILE waiting FOR the B-device to connect.This bit can be set only by the core and the application should write 1 to clear it.
Value Description
0x0 INACTIVE
0x1 ACTIVE
RW 0x0
17 hstnegdet
Mode:Host and Device
Host Negotiation Detected (HstNegDet)
The core sets this bit when it detects a host negotiation request
on the USB.This bit can be set only by the core and the application should write 1 to clear it.
Value Description
0x0 INACTIVE
0x1 ACTIVE
RW 0x0
9 hstnegsucstschng
Mode:Host and Device
Host Negotiation Success Status Change (HstNegSucStsChng)
The core sets this bit on the success or failure of a USB host
negotiation request. The application must read the Host
Negotiation Success bit of the OTG Control and Status register
(GOTGCTL.HstNegScs) to check For success or failure.This bit can be set only by the core and the application should write 1 to clear it.
Value Description
0x0 INACTIVE
0x1 ACTIVE
RW 0x0
8 sesreqsucstschng
Mode:Host and Device
Session Request Success Status Change
(SesReqSucStsChng)
The core sets this bit on the success or failure of a session
request. The application must read the Session Request
Success bit in the OTG Control and Status register
(GOTGCTL.SesReqScs) to check For success or failure.This bit can be set only by the core and the application should write 1 to clear it.
Value Description
0x0 INACTIVE
0x1 ACTIVE
RW 0x0
2 sesenddet
Mode:Host and Device
Session End Detected (SesEndDet)
The core sets this bit when the utmiotg_bvalid signal is
deasserted.This bit can be set only by the core and the application should write 1 to clear it.
Value Description
0x0 INACTIVE
0x1 ACTIVE
RW 0x0