INTMODE

         Reads reflect SERRINTEN.

Module Instance	Base Address	Register Address
`ecc_qspi_ecc_registerBlock`	`0xFF8C8400`	`0xFF8C841C`

Offset: 0x1C

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`Reserved`															`INTONCMP` `0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`Reserved`							`INTONOVF` `0x0`	`Reserved`							`INTMODE` `0x0`

INTMODE Fields

Bit	Name	Description	Access	Reset
16	`INTONCMP`	Enable interrupt on compare.	`RW`	`0x0`
8	`INTONOVF`	Enable interrupt on overflow.	`RW`	`0x0`
0	`INTMODE`	Interrupt mode for single-bit errors.	`RW`	`0x0`