INTTEST

         This bits is used to test interrupt from ECC RAM to GIC
      
Module Instance Base Address Register Address
ecc_onchip_ram_ecc_registerBlock 0xFF8C3000 0xFF8C3024

Offset: 0x24

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

TDERRA

0x0

Reserved

TSERRA

0x0

INTTEST Fields

Bit Name Description Access Reset
8 TDERRA
Test PORTA Double-bit error.
RW 0x0
0 TSERRA
Test PORTA Single-bit error.
RW 0x0