SERRCNTREG

         Maximum counter value for single-bit error interrupt
      
Module Instance Base Address Register Address
ecc_emac0_rx_ecc_registerBlock 0xFF8C0800 0xFF8C083C
ecc_emac1_rx_ecc_registerBlock 0xFF8C1000 0xFF8C103C
ecc_emac2_rx_ecc_registerBlock 0xFF8C1800 0xFF8C183C

Offset: 0x3C

Access: RW

Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

SERRCNT

0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

SERRCNT

0x0

SERRCNTREG Fields

Bit Name Description Access Reset
31:0 SERRCNT
Counter value
RW 0x0