uppwrprot

Module Instance	Base Address	Register Address
`i_qspi_qspiregs`	`0xFF809000`	`0xFF809054`

Offset: 0x54

Access: RW

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`subsector` `RW 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`subsector` `RW 0x0`

uppwrprot Fields

Bit	Name	Description	Access	Reset
31:0	`subsector`	The block number that defines the upper block in the range of blocks that is to be locked from writing. The definition of a block in terms of number of bytes is programmable via the Device Size Configuration register.	`RW`	`0x0`

Bit

Name

Description

Access

Reset

31:0

subsector

 The block number that defines the upper block in the range of blocks that is to be locked from writing. The definition of a block in terms of number of bytes is programmable via the Device Size Configuration register.

RW

0x0