idinten
Internal DMAC Interrupt Enable Register
| Module Instance | Base Address | Register Address |
|---|---|---|
| i_sdmmc_sdmmc | 0xFF808000 | 0xFF808090 |
Offset: 0x90
Access: RW
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved |
ai RW 0x0 |
ni RW 0x0 |
Reserved |
ces RW 0x0 |
du RW 0x0 |
Reserved |
fbe RW 0x0 |
ri RW 0x0 |
ti RW 0x0 |
||||||
idinten Fields
| Bit | Name | Description | Access | Reset | ||||||
|---|---|---|---|---|---|---|---|---|---|---|
| 9 | ai | Abnormal Interrupt Summary Enable. When set, an abnormal interrupt is enabled. This bit enables the following bits:
■ IDINTEN[2] - Fatal Bus Error Interrupt
■ IDINTEN[4] - DU Interrupt
|
RW | 0x0 | ||||||
| 8 | ni | Normal Interrupt Summary Enable. When set, a normal interrupt is enabled. When reset, a normal interrupt is disabled. This bit enables the following bits:
■ IDINTEN[0] - Transmit Interrupt
■ IDINTEN[1] - Receive Interrupt
|
RW | 0x0 | ||||||
| 5 | ces | Card Error summary Interrupt Enable. When set, it enables the Card Interrupt summary.
|
RW | 0x0 | ||||||
| 4 | du | Descriptor Unavailable Interrupt. When set along with Abnormal Interrupt Summary Enable, the DU interrupt is enabled.
|
RW | 0x0 | ||||||
| 2 | fbe | Fatal Bus Error Enable. When set with Abnormal Interrupt Summary Enable, the Fatal Bus Error Interrupt is enabled. When reset, Fatal Bus Error Enable Interrupt is disabled.
|
RW | 0x0 | ||||||
| 1 | ri | Receive Interrupt Enable. When set with Normal Interrupt Summary Enable, Receive Interrupt is enabled. When reset, Receive Interrupt is disabled.
|
RW | 0x0 | ||||||
| 0 | ti | Transmit Interrupt Enable. When set with Normal Interrupt Summary Enable, Transmit Interrupt is enabled. When reset, Transmit Interrupt is disabled.
|
RW | 0x0 |