uhs_reg
UHS-1 Register
| Module Instance | Base Address | Register Address |
|---|---|---|
| i_sdmmc_sdmmc | 0xFF808000 | 0xFF808074 |
Offset: 0x74
Access: RW
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
ddr_reg RW 0x0 |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
volt_reg RW 0x0 |
|||||||||||||||
uhs_reg Fields
| Bit | Name | Description | Access | Reset | ||||||
|---|---|---|---|---|---|---|---|---|---|---|
| 31:16 | ddr_reg | DDR mode. These bits indicate DDR mode of operation to the core for the data transfer.
0 Non-DDR mode
1 DDR mode
UHS_REG [16] should be set for card number 0, UHS_REG [17] for card number 1 and so on.
|
RW | 0x0 | ||||||
| 15:0 | volt_reg | High Voltage mode. Determines the voltage fed to the buffers by an
external voltage regulator.
0 Buffers supplied with 3.3V Vdd
1 Buffers supplied with 1.8V Vdd
These bits function as the output of the host controller and are fed to an external voltage regulator. The voltage regulator must switch the voltage of the buffers of a particular card to either 3.3V or 1.8V, depending on the
value programmed in the register.
VOLT_REG[0] should be set to 1’b1 for card number 0 in order to make it
operate for 1.8V.
|
RW | 0x0 |