rintsts
Raw Interrupt Status Register
| Module Instance | Base Address | Register Address |
|---|---|---|
| i_sdmmc_sdmmc | 0xFF808000 | 0xFF808044 |
Offset: 0x44
Access: RW
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
sdio_interrupt RW 0x0 |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ebe RW 0x0 |
acd RW 0x0 |
sbe RW 0x0 |
hle RW 0x0 |
frun RW 0x0 |
hto RW 0x0 |
bds RW 0x0 |
bar RW 0x0 |
dcrc RW 0x0 |
rcrc RW 0x0 |
rxdr RW 0x0 |
txdr RW 0x0 |
dto RW 0x0 |
cmd RW 0x0 |
re RW 0x0 |
cd RW 0x0 |
rintsts Fields
| Bit | Name | Description | Access | Reset | ||||||
|---|---|---|---|---|---|---|---|---|---|---|
| 31:16 | sdio_interrupt | Interrupt from SDIO card; one bit for each card. Bit[31] corresponds to Card[15], and bit[16] is for Card[0]. Writes to these bits clear them. Value of 1 clears bit and 0 leaves bit intact.
0-No SDIO interrupt from card
1-SDIO interrupt from card
In MMC-Ver3.3-only mode, bits always 0.
Bits are logged regardless of interrupt-mask status.
|
RW | 0x0 | ||||||
| 15 | ebe | Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status.
|
RW | 0x0 | ||||||
| 14 | acd | Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status.
|
RW | 0x0 | ||||||
| 13 | sbe | Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status.
|
RW | 0x0 | ||||||
| 12 | hle | Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status.
|
RW | 0x0 | ||||||
| 11 | frun | Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status.
|
RW | 0x0 | ||||||
| 10 | hto | Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status.
|
RW | 0x0 | ||||||
| 9 | bds | Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status.
|
RW | 0x0 | ||||||
| 8 | bar | Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status.
|
RW | 0x0 | ||||||
| 7 | dcrc | Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status.
|
RW | 0x0 | ||||||
| 6 | rcrc | Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status.
|
RW | 0x0 | ||||||
| 5 | rxdr | Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status.
|
RW | 0x0 | ||||||
| 4 | txdr | Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status.
|
RW | 0x0 | ||||||
| 3 | dto | Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status.
|
RW | 0x0 | ||||||
| 2 | cmd | Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status.
|
RW | 0x0 | ||||||
| 1 | re | Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status.
|
RW | 0x0 | ||||||
| 0 | cd | Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status.
|
RW | 0x0 |