mintsts
Masked Interrupt Status Register
Module Instance | Base Address | Register Address |
---|---|---|
i_sdmmc_sdmmc | 0xFF808000 | 0xFF808040 |
Offset: 0x40
Access: RO
Bit Fields | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
sdio_interrupt RO 0x0 |
|||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ebe RO 0x0 |
acd RO 0x0 |
strerr RO 0x0 |
hlwerr RO 0x0 |
fifoovunerr RO 0x0 |
dshto RO 0x0 |
datardto RO 0x0 |
respto RO 0x0 |
datacrcerr RO 0x0 |
respcrcerr RO 0x0 |
rxfifodr RO 0x0 |
dttxfifodr RO 0x0 |
dt RO 0x0 |
cmd_done RO 0x0 |
resp RO 0x0 |
cd RO 0x0 |
mintsts Fields
Bit | Name | Description | Access | Reset | ||||||
---|---|---|---|---|---|---|---|---|---|---|
31:16 | sdio_interrupt | Interrupt from SDIO card; one bit for each card. Bit[31] corresponds to Card[15], and bit[16] is for Card[0]. SDIO interrupt for card enabled only if corresponding sdio_int_mask bit is set in Interrupt mask register (mask bit 1 enables interrupt; 0 masks interrupt). 0-No SDIO interrupt from card 1-SDIO interrupt from card In MMC-Ver3.3-only mode, bits always 0.
|
RO | 0x0 | ||||||
15 | ebe | Interrupt enabled only if corresponding bit in interrupt mask register is set.
|
RO | 0x0 | ||||||
14 | acd | Interrupt enabled only if corresponding bit in interrupt mask register is set.
|
RO | 0x0 | ||||||
13 | strerr | Interrupt enabled only if corresponding bit in interrupt mask register is set.
|
RO | 0x0 | ||||||
12 | hlwerr | Interrupt enabled only if corresponding bit in interrupt mask register is set.
|
RO | 0x0 | ||||||
11 | fifoovunerr | Interrupt enabled only if corresponding bit in interrupt mask register is set.
|
RO | 0x0 | ||||||
10 | dshto | Interrupt enabled only if corresponding bit in interrupt mask register is set.
|
RO | 0x0 | ||||||
9 | datardto | Interrupt enabled only if corresponding bit in interrupt mask register is set.
|
RO | 0x0 | ||||||
8 | respto | Interrupt enabled only if corresponding bit in interrupt mask register is set.
|
RO | 0x0 | ||||||
7 | datacrcerr | Interrupt enabled only if corresponding bit in interrupt mask register is set.
|
RO | 0x0 | ||||||
6 | respcrcerr | Interrupt enabled only if corresponding bit in interrupt mask register is set.
|
RO | 0x0 | ||||||
5 | rxfifodr | Interrupt enabled only if corresponding bit in interrupt mask register is set.
|
RO | 0x0 | ||||||
4 | dttxfifodr | Interrupt enabled only if corresponding bit in interrupt mask register is set.
|
RO | 0x0 | ||||||
3 | dt | Interrupt enabled only if corresponding bit in interrupt mask register is set.
|
RO | 0x0 | ||||||
2 | cmd_done | Interrupt enabled only if corresponding bit in interrupt mask register is set.
|
RO | 0x0 | ||||||
1 | resp | Interrupt enabled only if corresponding bit in interrupt mask register is set.
|
RO | 0x0 | ||||||
0 | cd | Interrupt enabled only if corresponding bit in interrupt mask register is set.
|
RO | 0x0 |