fpga_bridge_lwsoc2fpga Address Map
This address space is allocated for FPGA-configured slaves driven by the lightweight HPS-to-FPGA bridge master. Address assignment within this space is user defined. For more information about Lightweight HPS-to-FPGA bridges, refer to the HPS-FPGA Bridges chapter of the Arria 10 Hard Processor System Technical Reference Manual.
| Module Instance | Base Address | End Address |
|---|---|---|
| i_fpga_bridge_lwsoc2fpga | 0xFF200000 | 0xFF3FFFFF |