hmc_clk

         HMC Clock and IO Lock status indicator

Module Instance	Base Address	Register Address
`i_sys_mgr_core`	`0xFFD12000`	`0xFFD120B4`

Size: 32

Offset: 0xB4

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`Reserved`													`io_cpa_lock_c` `RO 0x0`	`io_cpa_lock_b` `RO 0x0`	`io_cpa_lock_a` `RO 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`Reserved`					`io_pll_lock_c` `RO 0x0`	`io_pll_lock_b` `RO 0x0`	`io_pll_lock_a` `RO 0x0`	`Reserved`							`status` `RO 0x0`

hmc_clk Fields

Bit	Name	Description	Access	Reset
18	`io_cpa_lock_c`	CPA Lock C status	`RO`	`0x0`
17	`io_cpa_lock_b`	CPA Lock B status	`RO`	`0x0`
16	`io_cpa_lock_a`	CPA Lock A status	`RO`	`0x0`
10	`io_pll_lock_c`	PLL Lock C status	`RO`	`0x0`
9	`io_pll_lock_b`	PLL Lock B status	`RO`	`0x0`
8	`io_pll_lock_a`	PLL Lock A status	`RO`	`0x0`
0	`status`	HMC clock status: HMC clock not running = 0; HMC clock running = 1.	`RO`	`0x0`