GICC_PMR

         Interrupt Priority Mask Register
      
Note: For register and programming information, please refer to the CoreLink GIC-400 Generic Interrupt Controller Technical Reference Manual.
Module Instance Base Address Register Address
i_gic_wrapper_CPUif 0xFFFC2000 0xFFFC2004

Size: 32

Offset: 0x4

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.