CMIUIDR

         CMIU Identification Register
      
Module Instance Base Address Register Address
CCU_mem00 0xF70C0000 0xF70C0FFC

Size: 32

Offset: 0xFFC

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Cmc

RO 0x0

rsvd1

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

rsvd1

RO 0x0

HntCap

RO 0x0

CmiId

RO 0x0

ImplVer

RO 0x1

CMIUIDR Fields

Bit Name Description Access Reset
31 Cmc
Coherent Memory Cache
RO 0x0
30:14 rsvd1
Reserved (RAZ/WI)
RO 0x0
13 HntCap
Hint Capable
RO 0x0
12:8 CmiId
Coherent Memory Interface Identifier
RO 0x0
7:0 ImplVer
Implementation Version
RO 0x1