noc_fw_soc2fpga_scr Summary

SOC2FPGA Security Control Registers (SCR)

Base Address: 0xFFD21200

Register

Address Offset

Bit Fields
noc_fw_soc2fpga_soc2fpga_scr

soc2fpga

0x0

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

sdm_nand

RW 0x0

sdm_sdmmc

RW 0x0

etr

RW 0x0

axi_ap

RW 0x0

nand

RW 0x0

sdmmc

RW 0x0

usb1

RW 0x0

usb0

RW 0x0

emac2

RW 0x0

emac1

RW 0x0

emac0

RW 0x0

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

dma

RW 0x0

Reserved

mpu

RW 0x0