target_err_addr_hi

         Transaction address for which controller initiator interface received an ERROR target response. 
      
Module Instance Base Address Register Address
sdm_i_nand_dma 0xFFA10700 0xFFA10750

Size: 32

Offset: 0x50

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

value

RO 0x0

target_err_addr_hi Fields

Bit Name Description Access Reset
15:0 value
Most significant 16 bits 
RO 0x0