observer_main_ErrorLogger_0_ErrClr

         Error Clear Register
      
Module Instance Base Address Register Address
CCU_coh_cpu0_bypass_observer_main_ErrorLogger_0 0xF7100780 0xF7100790

Size: 32

Offset: 0x10

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

ERRCLR

RW 0x0

observer_main_ErrorLogger_0_ErrClr Fields

Bit Name Description Access Reset
0 ERRCLR
Set to 1 to clear ErrVld. NOTE The written value is not stored in ErrVld. A read always returns 0.
RW 0x0