indrdwater

         
      
Module Instance Base Address Register Address
i_qspi_qspiregs 0xFF8D2000 0xFF8D2064

Size: 32

Offset: 0x64

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

level

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

level

RW 0x0

indrdwater Fields

Bit Name Description Access Reset
31:0 level
 This represents the minimum fill level of the SRAM before a DMA peripheral access is permitted. When the SRAM fill level passes the watermark, an interrupt is also generated. This field can be disabled by writing a value of all zeroes. 
RW 0x0