CMIUDCR

         CMIU Debug Control Register
      
Module Instance Base Address Register Address
CCU_iospace10 0xF70C5000 0xF70C5F00

Size: 32

Offset: 0xF00

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

rsvd1

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

rsvd1

RO 0x0

DbgOp

RW 0x0

CMIUDCR Fields

Bit Name Description Access Reset
31:4 rsvd1
Reserved (RAZ/WI)
RO 0x0
3:0 DbgOp
Debug Operation
RW 0x0