DIRUUECR

         DIRU Uncorrectable Error Control Register
      
Module Instance Base Address Register Address
CCU_DCE3 0xF7083000 0xF7083140

Size: 32

Offset: 0x140

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

rsvd2

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

rsvd2

RO 0x0

ErrThreshold

RO 0x0

rsvd1

RO 0x0

ErrIntEn

RW 0x0

ErrDetEn

RW 0x0

DIRUUECR Fields

Bit Name Description Access Reset
31:12 rsvd2
Reserved (RAZ/WI)
RO 0x0
11:4 ErrThreshold
Uncorrectable Error Threshold
RO 0x0
3:2 rsvd1
Reserved (RAZ/WI)
RO 0x0
1 ErrIntEn
Uncorrectable Error Interrupt Enable
RW 0x0
0 ErrDetEn
Uncorrectable Error Detection Enable
RW 0x0