GGPIO

         General Purpose Input/Output Register

Module Instance	Base Address	Register Address
`i_usbotg_0_DWC_otg_intreg`	`0xFFB00000`	`0xFFB00038`
`i_usbotg_1_DWC_otg_intreg`	`0xFFB40000`	`0xFFB40038`

Size: 32

Offset: 0x38

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`GPO` `RW 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`GPI` `RO 0x0`

GGPIO Fields

Bit	Name	Description	Access	Reset
31:16	`GPO`	General Purpose Output (GPO) This field is driven as an output from the core, gp_o[15:0]. The application can program this field to determine the corresponding value on the gp_o[15:0] output.	`RW`	`0x0`
15:0	`GPI`	General Purpose Input (GPI) This field's read value reflects the gp_i[15:0] core input value.	`RO`	`0x0`

Bit

Name

Description

Access

Reset

31:16

GPO

General Purpose Output (GPO)
This field is driven as an output from the core, gp_o[15:0]. The
application can program this field to determine the
corresponding value on the gp_o[15:0] output.

RW

0x0

15:0

GPI

General Purpose Input (GPI)
This field's read value reflects the gp_i[15:0] core input value.

RO

0x0