SRR

         Software Reset Register.
      
Module Instance Base Address Register Address
i_uart_0_uart_address_block 0xFFC02000 0xFFC02088
i_uart_1_uart_address_block 0xFFC02100 0xFFC02188

Size: 32

Offset: 0x88

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_SRR_31to3

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_SRR_31to3

RO 0x0

XFR

WO 0x0

RFR

WO 0x0

UR

WO 0x0

SRR Fields

Bit Name Description Access Reset
31:3 RSVD_SRR_31to3
Reserved bits [31:3] - Read Only
RO 0x0
2 XFR
XMIT FIFO Reset.
Writes will have no effect when FIFO_MODE == NONE. This is a shadow register for
the XMIT FIFO Reset bit (FCR[2]). This can be used to remove the burden on software
having to store previously written FCR values (which are pretty static) just to
reset the transmit FIFO.
This resets the control portion of the transmit FIFO and treats the FIFO as empty.
This will also de-assert the DMA TX request and single signals when additional DMA
handshaking signals are selected
WO 0x0
1 RFR
RCVR FIFO Reset.
Writes will have no effect when FIFO_MODE == NONE. This is a shadow register for
the RCVR FIFO Reset bit (FCR[1]). This can be used to remove the burden on software
having to store previously written FCR values (which are pretty static) just to
reset the reeive FIFO.
This resets the control portion of the receive FIFO and treats the FIFO as empty.
This will also de-assert the DMA RX request and single signals when additional DMA
handshaking signals are selected (DMA_EXTRA == YES). Note that this bit is
'self-clearing' and it is not necessary to clear this bit.
WO 0x0
0 UR
UART Reset.
This asynchronously resets the DW_apb_uart and synchronously removes the reset
assertion. For a two clock implementation both pclk and sclk domains will be reset.
Value Description
0x0 No Uart Reset
0x1 Uart reset
WO 0x0