reg_caltiming7
Module Instance Base Address Register Address
iohmc_ctrl_inst_0_iohmc_ctrl_mmr_top_inst 0xF8010000 0xF8010098

Size: 32

Offset: 0x98

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

cfg_t_param_mps_to_valid

RW 0x0

cfg_t_param_mrs_to_valid

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

cfg_t_param_zqcs_to_valid

RW 0x0

cfg_t_param_zqcl_to_valid

RW 0x0

reg_caltiming7 Fields

Bit Name Description Access Reset
29:20 cfg_t_param_mps_to_valid 
iohmc_ctrl_mmr_top_inst.cfg_t_param_mps_to_valid[9:0]
Name:Max Power Saving to Valid
Description:Timing parameter for Maximum Power Saving to any valid command. tXMP.
RW 0x0
19:16 cfg_t_param_mrs_to_valid 
iohmc_ctrl_mmr_top_inst.cfg_t_param_mrs_to_valid[3:0]
Name:Mode Register Set to Valid
Description:Mode Register Setting to valid.
RW 0x0
15:9 cfg_t_param_zqcs_to_valid 
iohmc_ctrl_mmr_top_inst.cfg_t_param_zqcs_to_valid[6:0]
Name:ZQCAL Short to Valid
Description:Short ZQ calibration to valid.
RW 0x0
8:0 cfg_t_param_zqcl_to_valid 
iohmc_ctrl_mmr_top_inst.cfg_t_param_zqcl_to_valid[8:0]
Name:ZQCAL Long to Valid
Description:Long ZQ calibration to valid.
RW 0x0