mem00 Address Map

Module Instance	Base Address	End Address
`CCU_mem00`	`0xF70C0000`	`0xF70C0FFF`

Register	Offset	Width	Access	Reset Value	Description
`CMIUTAR`	`0x4`	`32`	`RO`	`0x00000000`	CMIU Transaction Activity Register
`CMIUCECR`	`0x100`	`32`	`RW`	`0x00000000`	CMIU Correctable Error Control Register
`CMIUCESR`	`0x104`	`32`	`RW`	`0x00000000`	CMIU Correctable Error Status Register
`CMIUCELR0`	`0x108`	`32`	`RW`	`0x00000000`	CMIU Correctable Error Location Register 0
`CMIUCESAR`	`0x124`	`32`	`RW`	`0x00000000`	CMIU Correctable Error Status Alias Register
`CMIUDCR`	`0xF00`	`32`	`RW`	`0x00000000`	CMIU Debug Control Register
`CMIUDAR`	`0xF04`	`32`	`RO`	`0x00000000`	CMIU Debug Activity Register
`CMIUDLR`	`0xF08`	`32`	`RW`	`0x00000000`	CMIU Debug Location Register
`CMIUDDR`	`0xF10`	`32`	`RO`	`0x00000000`	CMIU Debug Data Register
`CMIUCMCIDR`	`0xFF8`	`32`	`RO`	`0x00000000`	CMIU Coherent Memory Cache Identification Register
`CMIUIDR`	`0xFFC`	`32`	`RO`	`0x00000001`	CMIU Identification Register