reg_sideband3 

         Sideband 3 Register
Module Instance Base Address Register Address
iohmc_ctrl_inst_0_iohmc_ctrl_mmr_top_inst 0xF8010000 0xF80100B8

Size: 32

Offset: 0xB8

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

mmr_zqcal_short_req

RW 0x0

reg_sideband3 Fields

Bit Name Description Access Reset
0 mmr_zqcal_short_req 
iohmc_ctrl_mmr_top_inst.mmr_zqcal_short_req
Name:User Short ZQ Cal Request
Description:When asserted, indicates short ZQ cal request. This bit is write clear.
RW 0x0