CAIUDLR

         CAIU Debug Location Register

Module Instance	Base Address	Register Address
`CCU_fpga10`	`0xF7001000`	`0xF7001F08`

Size: 32

Offset: 0xF08

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`DbgWord` `RW 0x0`						`DbgStruct` `RW 0x0`						`DbgEntry` `RW 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`DbgEntry` `RW 0x0`

CAIUDLR Fields

Bit	Name	Description	Access	Reset
31:26	`DbgWord`	Debug Word	`RW`	`0x0`
25:20	`DbgStruct`	Debug Structure	`RW`	`0x0`
19:0	`DbgEntry`	Debug Entry	`RW`	`0x0`