reg_caltiming6
Module Instance Base Address Register Address
iohmc_ctrl_inst_0_iohmc_ctrl_mmr_top_inst 0xF8010000 0xF8010094

Size: 32

Offset: 0x94

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

cfg_t_param_pdn_period

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

cfg_t_param_pdn_period

RW 0x0

cfg_t_param_arf_period

RW 0x0

reg_caltiming6 Fields

Bit Name Description Access Reset
28:13 cfg_t_param_pdn_period 
iohmc_ctrl_mmr_top_inst.cfg_t_param_pdn_period[15:0]
Name:Power Down Period
Description:Clock power down recovery period.
RW 0x0
12:0 cfg_t_param_arf_period 
iohmc_ctrl_mmr_top_inst.cfg_t_param_arf_period[12:0]
Name:Auto Refresh Period
Description:Auto-refresh period.
RW 0x0