reg_sideband4 

         Sideband 4 Register
Module Instance Base Address Register Address
iohmc_ctrl_inst_0_iohmc_ctrl_mmr_top_inst 0xF8010000 0xF80100BC

Size: 32

Offset: 0xBC

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

mmr_self_rfsh_req

RW 0x0

reg_sideband4 Fields

Bit Name Description Access Reset
3:0 mmr_self_rfsh_req 
iohmc_ctrl_mmr_top_inst.mmr_self_rfsh_req[3:0]
Name:User Self Refresh Request
Description:When asserted, indicates self refresh request to the specific rank. Each bit corresponds to each rank. These bits are write clear.
Note: User may NOT program any combination of values. Legal Values are 0(hex) and F(hex). All other values are ILLEGAL.
RW 0x0