sdm_NAND_status Summary

Contains interrupt and status registers of controller accessible by software.

Base Address: 0xFFA10400

Register Address Offset	Bit Fields
`sdm_i_nand_status`
`transfer_mode` `0x0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`value3` `RO 0x0`		`value2` `RO 0x0`		`value1` `RO 0x0`		`value0` `RO 0x0`
`intr_status0` `0x10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`erased_page` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`page_xfer_inc` `RW 0x0`	`pipe_cmd_err` `RW 0x0`	`rst_comp` `RW 0x0`	`int_act` `RW 0x0`	`unsup_cmd` `RW 0x0`	`locked_blk` `RW 0x0`	`pipe_cpybck_cmd_comp` `RW 0x0`	`erase_comp` `RW 0x0`	`program_comp` `RW 0x0`	`load_comp` `RW 0x0`	`erase_fail` `RW 0x0`	`program_fail` `RW 0x0`	`time_out` `RW 0x0`	`dma_cmd_comp` `RW 0x0`	`Reserved`	`ecc_uncor_err` `RW 0x0`
`intr_en0` `0x20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`erased_page` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`page_xfer_inc` `RW 0x0`	`pipe_cmd_err` `RW 0x0`	`rst_comp` `RW 0x1`	`int_act` `RW 0x0`	`unsup_cmd` `RW 0x0`	`locked_blk` `RW 0x0`	`pipe_cpybck_cmd_comp` `RW 0x0`	`erase_comp` `RW 0x0`	`program_comp` `RW 0x0`	`load_comp` `RW 0x0`	`erase_fail` `RW 0x0`	`program_fail` `RW 0x0`	`time_out` `RW 0x0`	`dma_cmd_comp` `RW 0x0`	`Reserved`	`ecc_uncor_err` `RW 0x0`
`page_cnt0` `0x30` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`value` `RO 0x0`
`err_page_addr0` `0x40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RO 0x0`
`err_block_addr0` `0x50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RO 0x0`
`intr_status1` `0x60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`erased_page` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`page_xfer_inc` `RW 0x0`	`pipe_cmd_err` `RW 0x0`	`rst_comp` `RW 0x0`	`int_act` `RW 0x0`	`unsup_cmd` `RW 0x0`	`locked_blk` `RW 0x0`	`pipe_cpybck_cmd_comp` `RW 0x0`	`erase_comp` `RW 0x0`	`program_comp` `RW 0x0`	`load_comp` `RW 0x0`	`erase_fail` `RW 0x0`	`program_fail` `RW 0x0`	`time_out` `RW 0x0`	`dma_cmd_comp` `RW 0x0`	`Reserved`	`ecc_uncor_err` `RW 0x0`
`intr_en1` `0x70` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`erased_page` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`page_xfer_inc` `RW 0x0`	`pipe_cmd_err` `RW 0x0`	`rst_comp` `RW 0x1`	`int_act` `RW 0x0`	`unsup_cmd` `RW 0x0`	`locked_blk` `RW 0x0`	`pipe_cpybck_cmd_comp` `RW 0x0`	`erase_comp` `RW 0x0`	`program_comp` `RW 0x0`	`load_comp` `RW 0x0`	`erase_fail` `RW 0x0`	`program_fail` `RW 0x0`	`time_out` `RW 0x0`	`dma_cmd_comp` `RW 0x0`	`Reserved`	`ecc_uncor_err` `RW 0x0`
`page_cnt1` `0x80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`value` `RO 0x0`
`err_page_addr1` `0x90` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RO 0x0`
`err_block_addr1` `0xA0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RO 0x0`
`intr_status2` `0xB0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`erased_page` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`page_xfer_inc` `RW 0x0`	`pipe_cmd_err` `RW 0x0`	`rst_comp` `RW 0x0`	`int_act` `RW 0x0`	`unsup_cmd` `RW 0x0`	`locked_blk` `RW 0x0`	`pipe_cpybck_cmd_comp` `RW 0x0`	`erase_comp` `RW 0x0`	`program_comp` `RW 0x0`	`load_comp` `RW 0x0`	`erase_fail` `RW 0x0`	`program_fail` `RW 0x0`	`time_out` `RW 0x0`	`dma_cmd_comp` `RW 0x0`	`Reserved`	`ecc_uncor_err` `RW 0x0`
`intr_en2` `0xC0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`erased_page` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`page_xfer_inc` `RW 0x0`	`pipe_cmd_err` `RW 0x0`	`rst_comp` `RW 0x1`	`int_act` `RW 0x0`	`unsup_cmd` `RW 0x0`	`locked_blk` `RW 0x0`	`pipe_cpybck_cmd_comp` `RW 0x0`	`erase_comp` `RW 0x0`	`program_comp` `RW 0x0`	`load_comp` `RW 0x0`	`erase_fail` `RW 0x0`	`program_fail` `RW 0x0`	`time_out` `RW 0x0`	`dma_cmd_comp` `RW 0x0`	`Reserved`	`ecc_uncor_err` `RW 0x0`
`page_cnt2` `0xD0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`value` `RO 0x0`
`err_page_addr2` `0xE0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RO 0x0`
`err_block_addr2` `0xF0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RO 0x0`
`intr_status3` `0x100` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`erased_page` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`page_xfer_inc` `RW 0x0`	`pipe_cmd_err` `RW 0x0`	`rst_comp` `RW 0x0`	`int_act` `RW 0x0`	`unsup_cmd` `RW 0x0`	`locked_blk` `RW 0x0`	`pipe_cpybck_cmd_comp` `RW 0x0`	`erase_comp` `RW 0x0`	`program_comp` `RW 0x0`	`load_comp` `RW 0x0`	`erase_fail` `RW 0x0`	`program_fail` `RW 0x0`	`time_out` `RW 0x0`	`dma_cmd_comp` `RW 0x0`	`Reserved`	`ecc_uncor_err` `RW 0x0`
`intr_en3` `0x110` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`erased_page` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`page_xfer_inc` `RW 0x0`	`pipe_cmd_err` `RW 0x0`	`rst_comp` `RW 0x1`	`int_act` `RW 0x0`	`unsup_cmd` `RW 0x0`	`locked_blk` `RW 0x0`	`pipe_cpybck_cmd_comp` `RW 0x0`	`erase_comp` `RW 0x0`	`program_comp` `RW 0x0`	`load_comp` `RW 0x0`	`erase_fail` `RW 0x0`	`program_fail` `RW 0x0`	`time_out` `RW 0x0`	`dma_cmd_comp` `RW 0x0`	`Reserved`	`ecc_uncor_err` `RW 0x0`
`page_cnt3` `0x120` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`value` `RO 0x0`
`err_page_addr3` `0x130` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RO 0x0`
`err_block_addr3` `0x140` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RO 0x0`